This application relates to and claims priority to Japanese Patent Application Nos. 2001-137822 filed on May 8, 2001 and 2001-151594, filed on May 21, 2001, the contents of which are hereby incorporated by reference.
The present invention relates to a silicon carbide semiconductor device having a J-FET and a manufacturing method.
Efforts are underway to develop MOSFETs using SiC, but devices developed to date have not reached their full potential, because of inadequate mobility and reliability. On the other hand, it has been reported that normally-on J-FETs offer high voltage resistance and low on-resistance.
Such a semiconductor device, having a J-FET, is provided in, for example, U.S. Pat. No. 5,396,085. This semiconductor device operates as a normally-off transistor by having a combination of a normally-on J-FET made of SiC and an MOSFET made of silicon, having a low voltage resistance. This device is able to resist a small reverse bias voltage (low drain voltage) with the MOSFET made of silicon and to resist a large reverse bias voltage (high drain voltage) with a depletion layer extending out in the J-FET made of SiC.
This conventional semiconductor device, however, includes two types of semiconductor materials, which are silicon and SiC, and requires two chips. For this reason, this device has a large package and suffers from losses caused by wiring lines. Furthermore, this semiconductor device cannot operate at high temperature (for example, 200 degrees C. or above), because of the silicon MOSFET.
The present invention addresses this issue by providing a single chip, normally-off J-FET with low on-resistance. The objective of the present invention is to provide a silicon carbide semiconductor device that can operate at high temperature and a method of manufacturing such a device.
To achieve this objective, the invention is a silicon carbide semiconductor device, which includes a semiconductor substrate of a first conductance type made of silicon carbide, a semiconductor layer of the first conductance type made of silicon carbide of a higher resistance than the semiconductor substrate and formed on a main surface of the semiconductor substrate, first gate areas of a second conductance type formed on a surface of the semiconductor layer on both sides of a channel, which is formed in a prescribed area on the surface of the semiconductor layer, a channel layer of the first conductance type formed over the semiconductor layer and the first gate area, second gate areas of the second conductance type formed in isolation from the first gate area in the channel layer, high impurity concentration areas of the first conductance type formed in the channel layer, source areas of the first conductance type formed in positions above the first gate areas in the channel layer, a third gate area of the second conductance type formed above the channel layer or on the surface of the channel layer and having parts that face the second gate areas, source electrodes electrically connected to the first gate areas and the source areas, a gate electrode electrically connected to the third gate area, and a drain electrode formed on a backside of the semiconductor substrate.